Logo image
Compiler-Directed Dynamic Voltage/Frequency Scheduling for Energy Reduction in Microprocessors
Technical documentation   Open access

Compiler-Directed Dynamic Voltage/Frequency Scheduling for Energy Reduction in Microprocessors

Chung-Hsing Hsu, Ulrich Kremer and Michael Hsiao
Rutgers University
2001
DOI:
https://doi.org/10.7282/T3CJ8J4G

Abstract

Dynamic voltage and frequency scaling of the CPU has been identified as one of the most effective ways to reduce energy consumption of a program. This paper discusses a compilation strategy that identifies scaling opportunities without significant overall performance penalty. Simulation results show CPU energy savings of 3.97%- 23.75% for the SPECfp95 benchmark suite with a performance penalty of at most 2.53%.
pdf
dcs-tr-431134.19 kBDownloadView
Version of Record (VoR) Technical Documentation Open Access
url
Report an accessibility issueView
Please complete a content remediation request to report an accessibility issue with a library electronic resource, website, or service.

Metrics

176 File downloads
86 Record Views

Details

Logo image