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Time Skewing for Parallel Computers
Technical documentation   Open access

Time Skewing for Parallel Computers

David Wonnacott
Rutgers University
1999
DOI:
https://doi.org/10.7282/T3TQ655C

Abstract

Time skewing is a compile-time optimization that can provide arbitrarily high cache hit rates for a class of iterative calculations, given a sufficient number of time steps and a cache that grows in size as a function of the memory balance and the calculation performed within the loop body. In this article, we give a generalization of time skewing for stencils on multiprocessor architectures, and discuss time skewing for multilevel caches.
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